Waveshare Xilinx Spartan development board first setup tutorial

 library IEEE;  
 use IEEE.STD_LOGIC_1164.ALL;  
 entity nandgate is  
   Port ( a : in STD_LOGIC;  
       b : in STD_LOGIC;  
       f : out STD_LOGIC);  
 end nandgate;  
 architecture Behavioral of nandgate is  
 begin  
 f<= a nand b;  
 end Behavioral;